1. Field of the Invention
The present invention relates to a semiconductor device having a void formed between wiring layers and a method of manufacturing the semiconductor device.
2. Description of the Related Art
Growing refinement of semiconductor devices has recently caused a problem of increase in a capacity between wiring layers. To overcome the problem, JP-A-10-229121 discloses a method in which a void is made between wiring layers so as to reach a region lower than the underside of the wiring.
According to the method disclosed by JP-A-10-229121, a trench is firstly formed in an interlayer insulating film constituting a lower layer, and subsequently, a wiring layer is deposited. The wiring layer is etched along the trench so that a wiring pattern is formed. Lastly, an interlayer insulating film is deposited between the wiring patterns so that a void is formed so as to extend from an upper end to an entire lower end of the wiring pattern, whereby a capacity between the wiring layers is reduced.
As obvious from the above-mentioned document, the capacity between the wiring layers can be reduced to some degree when a void is formed so as to extend from an upper end to an entire lower end of the wiring pattern. However, a further reduction in the capacity between the wiring layers has been desired with progress in the refinement of elements.